This disclosure relates to a semiconductor memory device, and more particularly, to a semiconductor memory device having an on-die termination circuit capable of outputting an ODT control signal.
Semiconductor memory devices exchange data signals with a memory controller. Termination resistance can be used to improve signal integrity by minimizing signal reflections. When such a termination resistance is inside a semiconductor memory device, it can be referred to as an ODT resistance. A circuit which includes and controls the ODT resistance can be referred to as an ODT circuit.
Since the termination resistance for optimizing signal integrity can differ between operations, a dynamic ODT mode can be used. The semiconductor memory device can be configured to allow a user to select various termination resistances in each of a normal ODT mode and a dynamic ODT mode.